Using a watchdog to monitor the function of a microprocessor, which is also understood to include microcontrollers according to the present application, is known. Watchdogs are circuits assigned to the microprocessor which check whether a reset pulse has been generated by the microprocessor within a time interval of predetermined duration. The periodic generation of a reset pulse indicates the proper function of the microprocessor. If no reset pulse is received, a reset of the microprocessor is performed, through which the microprocessor is to be returned to a proper state.
Checking the function of a watchdog by using a second watchdog is known from German Published Patent Application No. 43 30 940, for example. For this purpose, the watchdogs are alternately disrupted by the microprocessor and the microprocessor checks whether the other watchdog triggers an alarm and/or generates a reset.
A disadvantage of the watchdog described above is that it is not capable of monitoring the microprocessor for a clock frequency which is too high. In order to avoid at least this problem, a modified watchdog in which the time interval monitored has not only an upper limit but also a lower limit, so that the reset pulse must be received between the upper and the lower limit of the time interval during proper operation, is known from PCT Publication No. WO 97/32282. If the clock frequency of the microprocessor is too high, the reset pulse is received before the lower interval limit and an alarm signal is generated.
A disadvantage of the known related art is that both measures result in increased construction cost and a more complicated structure of the watchdog. The arrangement of two watchdogs and their mutual monitoring is a significantly increased construction cost. In addition, the construction cost for a modified watchdog which is capable of monitoring both an upper limit and a lower limit is significantly increased in comparison to a watchdog which monitors only an upper interval limit.